Simple Amplifier Circuit
This example applies the VSA procedure to the
Amplifier Circuit shown below:
The transfer function from the input node
"in" to the output node "out" is desired. You probably don’t
need K9 Analysis to solve this problem. This example is included to illustrate
the procedure.
Construct General Schematic
The first step is to create a general
schematic.
The resistors need to be replaced with
Impedances. The component values will be dropped.
The Amplifier is modeled as a voltage
controlled voltage source with gain A.
An input voltage source, Vin,
is added to stimulate the circuit. We are assuming that the input is an ideal
voltage source. The circuit operation of
many circuits is dependent on the input source impedance. You need to
accurately model the input!
All the circuit nodes have labels. The
circuit is complete and ready for SFG construction.
SFG Construction
The SFG requires nodes for the input voltage
source, Vin, and circuit nodes V(in), V(a), and
V(out).
Vin is an input. The SFG just needs a node for Vin.
V(in) is a voltage-controlled node.
V(in) =
Vin
In SFG form
V(in) = 1
* Vin
The SFG gets a branch from Vin to V(in) with gain equal to one.
The "a" node is a passive summing
node. It receives signals only from V(in). You could
write a potential divider equation for V(a). We will
use Brandy’s Gain
Formula. The SFG gain is the Parallel
Impedance of the destination node divided by the connecting Impedance.
V(a) =
ZPa/Z1 * V(in)
ZPa = Z1
// Z2
V(out) is a voltage-controlled node. ZPout
is equal to zero. V(out) is specified by the
controlled source.
V(out) =
A * V(a)
The
SFG is complete.
Check the SFG
Vin is an input. It does not have any incoming branches.
V(in) is a voltage-controlled node. It is equal to Vin.
V(a) is a summing node. It has an incoming branch with
gain equal the parallel impedance of the destination node divided by the
connecting impedance.
Vout is a voltage-controlled node.
The SFG shows signal flow from Vin to V(out).
Analyze the SFG
The SFG contains no loops. The determinant is
hence equal to one.
D = 1
The SFG contains a single path from Vin to V(out) with gain equal to ZPa/Z1 times A.
V(out) /
Vin = ZPa/Z1 * A
Since the SFG has no loops, no corrections
are needed. The SFG gains are the actual circuit gains.
Check the answer
Opening Z1 should force the gain to zero.
Setting Z1 to an infinite value forces the gain to zero.
Shorting Z2 should force the gain to zero. Z2
is included in ZPa. Setting Z2 equal to zero will
force ZPa to be equal to zero.
What happened to Z7? It is not included in
the gain function. Z7 is part of the impedance at node out. Since the voltage
source forces ZPout to be equal to zero, Z7 has no effect. This was
automatically handled by the K9 procedure.
Summary
The VSA procedure created a SFG for the
circuit.
|
Circuit |
Signal Flow Graph |
|
|
ZPa/Z1 = (R1 // R2)/R1 |
For a voltage source input, the signal is
attenuated at node a and amplified to create the
output. There are no loops in the SFG.
The path gain is the circuit gain.
For a simple two input passive circuit, look
at the Simple
Passive example.
For a simple two input passive circuit, with
a non-ideal input source, look at the Simple Passive with non-ideal source example.
For a more difficult example, look at the Ladder example.