SFG Primer

 

The Signal Flow Graph (SFG) was developed by Mason in the 1950’s. A SFG can be used in many applications. The SFG represents a set of equations. Mason’s rule provides a graphical solution to the set of equations.

 

Mason wanted SFGs to be more than just a way to solve linear equations. He wanted SFGs to display signal flow in an intuitive manner that any engineer could understand.

 

Electronic circuits can be represented by a set of equations. A SFG can be constructed from these equations by selecting one variable from each equation as a node in the SFG. If the nodes are not selected carefully, the SFG may not represent the circuit operation in an intuitive manner. Mason called these SFGs “ugly graphs”.

“The challenge facing us at the start of an analysis problem is to express the pertinent relationships as a flow graph having simplicity and beauty.”

Samuel J. Mason  On The Logic of feedback”, M.I.T., 1951

 

K9 exploits the power of SFGs to simplify circuit analysis and to create an intuitive circuit description. Only simple non-interactive equations are needed. All circuit interactions are handled by the SFG. Feedback is not an issue.

 

In K9 analysis, the SFG is created one node at a time from simple circuit operations. The SFG is simply a graphical display of the circuit equations. Instead of writing the equation, K9 records the equations on the SFG. This allows the SFG to show how signals propagate thru the circuit and to display any circuit interactions via Loops in the SFG.

 

There are many ways to create a SFG. The Voltage Signal Analysis (VSA) procedure provides a structured approach that transforms a circuit schematic into a SFG. The procedure maintains the signal flow thru components. Signals flowing thru circuit components become SFG branches.

 

Before exploring the SFG, some basic graph elements need to be defined.

Graph Theory

 

Graph theory is a fun branch of pure mathematics. There are lots of interesting problems. The graph nomenclature varies with the problem. Electronics is not a problem discussed in graph theory, so we need to borrow some of the concepts. We don’t want to miss out on the fun.

 

A graph is a set of nodes (vertices) and a set of branches (lines, edges) that connect two nodes.

 

 

Nodes are represented by circles, and branches are represented by lines. In the above graph, the blue segments are branches. The red segment does not have two nodes and is not a branch. A branch is defined by the nodes that it is connected to.

Each Node needs a label to identify the node.

 

A basic graph can be used to describe Electronic circuits. The nodes are circuit nodes and the branches are circuit components. In the example below the circuit nodes are the graph nodes. The branches are components.

 

Schematic

Netlist

R_R1         1 2  1k 

R_R3         in 1  1k 

R_R5         1 3  1k 

R_R2         3 2  1k 

C_C1         2 0  1n 

R_R4         out 3  1k 

R_Rl         0 out  1k 

V_Vin         in 0   

 

A circuit schematic is an enhanced graph in that it contains additional information. You can display the information graphically or in a Netlist. A Schematic can provide a clear circuit description. The rules are discussed on the Schematic page. The Netlist only provides connectivity information. No circuit description is implied.

 

 

Directed Graph

 

In a Directed Graph the branches have arrows and a gain value. The arrow restricts signal flow to a single direction. A graph is fine for a circuit schematic, but a Directed graph is needed to have different values for forward and reverse signal flow.  A circuit component can create different values of signal flow for different directions. With a directed graph, we can have different values for each direction.

 

 

A directed graph allows signal flow to be shown. In the above graph, node Vin sends a signal to node V1 via branch g3. The SFG branch was created by R3. R5 has two separate branches between V1 and V3. The signal flow from V1 to V3 has gain g5 while the signal flow from V3 to V1 has gain g5f.

 

Each branch has a Source node and a Destination node. The g3 branch has node Vin as a source node and node V1 as a destination node. A Source node is the input for the branch gain, and the Destination node is the output for the branch gain. The branch receives a signal from the Source node and sends it to the Destination node.

 

Branches can be cascaded to form a Path. The destination node of the first branch must be the same as the source node of the connecting branch. The above graph has a path from node Vin to node Vout via branches g3, g1, g2 and g4. There is another path via g3, g5, and g4 from Vin to Vout.

 

A path is a sequence of branches that does not go thru any node more than once. Any node can be included in a path as a source node only once. A path must also contain a node as a destination node only once. In the above figure g3 – g1 – g2  is a valid path. The path g3 – g1 – g1f –g1 – g2 is not a valid path since it goes thru node V2 twice. Any branch can be contained in a path only once. The previous sequence of branches included g1 twice and hence is not a path.

 

A path is a cascade of branches. The path gain is the product of the branch gains that make the path.

In the SFG above one path from Vin to Vout has a path gain of g3*g1*g2*g4. The other path gas the gain g3*g5*g4

 

In K9, the path gain is the circuit gain if no interactions are present. The circuit gain is the sum of the path gains times correction factors.

 

A path that has the same node as the source node and the final destination node is a Loop. In the figure g1 – g1f is a loop. The path g5 – g2f – g1f is also a loop. There are additional loops. A loop that has only a single branch is called a Self Loop.

 

In K9, loops represent circuit interactions. K9 uses loops to make correction factors for circuit interaction.

 

SFG

 

A Signal Flow Graph (SFG) is a directed graph that represents a set of linear equations.  Each SFG Node is a variable in the equation or an input node. In K9 a variable is a voltage or current. A branch gain is a circuit gain.

 

A node that has only branches leaving the node is an Input node. In the SFG Vin is an input node. A node that has at least one incoming branch is an Output node. Nodes V1, V2, V3, and Vout are output nodes.

 

An output node sums the incoming branch signals to form the node value.

 

 

V1 = (Vin * g3) + (V2 * g1f) + (V3 * g5f)

V2 = (V1 * g1) + (V3 * g2f)

V3 = (V1 * g5) + (V2 * g2) + (Vout * g4f)

Vout = (V3 * g4)

 

Each output node is a signal summer. V1 adds the green branches, V2 adds the red branches, V3 adds the purple branches, and Vout adds the black branch.

 

A SFG has an equation for each output node. The equations are in the SFG format shown above. They can be rearranged for matrix operation. A SFG is simply a graphical representation of a System of linear equations. A SFG can be transformed into a matrix and vice versa.

 

The above equations in general form are:

 

V1

-g1f * V2

-g5f* V3

 

= g3 * Vin

-g1 * V1

+ V2

-g2f * V3

 

= 0

-g5 * V1

-g2 * V2

+ V3

-g4f * Vout

= 0

 

 

-g4 * V3

+ Vout

= 0

 

 

The mathematical rules for solving the equations apply. The equation should not be conflicting. The equations should allow a single solution. If the set of equations is not independent, the SFG is not valid. From an equation point of view, there is no difference between a SFG and a set of equations.

 

Why use a SFG for linear equations?

 

First, it is very impolite to ask that question. Graphs need to be appreciated for their beauty. But since you need to exploit the SFG, Mason’s Rule provides a fun way to solve simultaneous equations. Instead of algebra you find paths and loops in the SFG to write the answer one piece at a time. Lot’s of fun. The second reason is that the SFG can provide a clear description of circuit operation, saving you a thousand words.

 

You can create a SFG from any set of equations by choosing the variable that you want the equation to represent. Let’s assume a different assignment. We’ll use V2 for the first equation, V1 for the second equation, Vout for the third equation and V3 for the last equation.

 

V2 = (1/g1f) * V1 + (-g5f/g1f) * V3 + (– g3/g1f) * Vin

V1 = (1/g1) * V2 + (-g2f/g1) * V3

Vout = (-g1/g4f) * V1 + (-g2/g4f) * V2 + (1/g4f) * V3

V3 = (1/g4) * Vout

 

The above equations are the same as the original equations. The new SFG is shown below:

 

 

The above SFG is an accurate representation of the circuit equations. The table below shows the schematic and two SFGs.

 

Schematic

VSA SFG

ugly SFG

 

The nodes are the same in both SFGs. Each SFG represents the circuit equations. From an equation point of view, there is no difference. From a signal flow point of view, there is a mayor difference. The VSA SFG shows the signal flow created by the schematic components. The other SFG is an ugly SFG.

 

The VSA SFG shows that the input sends a signal to V1. The ugly SFG shows that the input sends a signal to V2 and then via other nodes to the output, a strange description.

 

There are many other SFGs that can be created by manipulating the equations and then transferring them into SFG format. You can get even more SFGs by changing some or all of the variables to current.  If a SFG represents a valid set of equations, input to output gains can be found with Mason’s Gain Formula.

 

Mason gain formula

 

Mason’s gain formula is the formula for the input to output gain in a SFG. If you have multiple inputs, the gain formula is the input to output gain with other inputs equal to zero. Mason automatically applies superposition.

 

 

Where:

Yout = Output

Yin = Input

Gk = path gain k from Yin to Yout

∆ = graph determinant

k = determinant of graph with path k removed

 

The gain is simply the sum of input to output path gains times correction factors. Each path has a numerator and a denominator correction factor. The denominator correction factor, ∆, is the same for all paths. ∆ is the determinant of the graph and formed from all loops in the SFG. Some paths may not touch all loops. In this case a numerator ∆k term is needed to correct for the loops not touched by the forward path. The ∆k term is the ∆ term for the SFG that remains when the path is removed. ∆ corrects for all the loops. ∆k cancels the ∆ corrections for loops not touched by the path.

 

∆ = 1 - ∑ Li + ∑ Li * Lj - ∑ Li * Lj * Lk + …

 

Where:

 

          Li = Loop gain

          Li * Lj = product of the Loop gains for two non-touching loops

          Li * Lj * Lk = product of the Loop gains for three non-touching loops

 

The ∆ term is formed from SFG loops.

If the SFG has no loops, ∆ = 1. No correction is needed.

If the SFG has Loops, add all the Loop gains to form the ∑Li term.

Next look for non-touching (no common node) loops. Each pair is included in the  Li * Lj term.

Next look for sets of 3 non-touching loops. Include each set in the ∑Li * Lj * Lk term.

Continue the for higher order sets of non-touching loops until an empty set is found.

Note that the signs of the set sums alternate.

 

The ∆ term is the correction factor for circuit interaction. Circuit interactions can make Electronic Analog Circuit Analysis difficult. Mason provides a simple correction factor. As long as you remember to apply the corrections, you can ignore circuit interaction. This can make Analog Circuit Analysis Dog-Gone-Simple.

 

Mason’s Gain Formula is the SFG gain formula. It is also THE gain formula for Electronic circuits. You need to master this formula. Let’s apply it to the VSA SFG.

 

 

The first step is to find all the loops, some may not be obvious.  The SFG has some loops created by the circuit components. R1, R2, R5, and R4 created the following loops.

         

L1 = g1 * g1f

L2 = g2 * g2f

L3 = g5 * g5f

L4 = g4 * g4f

 

The SFG has a loop that flows from V1 to V2 to V3 and back to V1.

 

 

L5 = g1 * g2 * g5f

 

The above loop could be formed by starting at V2 and going to V3 to V1 and back to V2.  This is the same loop and does not count as an additional loop. The set of branches creates the loop. Changing the branch order does not create a new loop.

 

There is a similar loop in the opposite direction, i.e. V1 to V3 to V2 to V1.

 

L6 = g5 * g2f * g1f

 

This SFG has lots of loops. Are there any pairs of non-touching loops? Yes, L1 and L4 have no common node. Any other pairs? What about sets of three non-touching loops. There are none. Let’s find ∆.

 

∆ = 1 – (L1 + L2 + L3 + L4 + L5 + L6) + (L1 * L4)

∆ = 1 – g1*g1f – g2*g2f – g3*g3f – g4*g4f – g1*g2*g5f – g5*g2f*g1f + g1*g1f*g4*g4f

 

We are now ready to for the input to output gain function. For this we need to find paths from Vin to Vout in the SFG.

 

The first path is Vin to V1 to V2 to V3 to Vout.

 

 

G1 = g3*g1*g2*g4

 

This path flows thru all the nodes. If we remove the path, the SFG has no nodes and no loops.

 

1 = 1

 

The second path is Vin to V1 to V3 to Vout.

 

 

G2 = g3 * g5 * g4

 

When we remove this path, the SFG has only node V2 and no loops.

 

2 = 1

 

To get the gain equation we need to add the path gains and apply the corrections.

 

 

The above formula says that the input to output gain is the sum of two path gains times a correction ∆. Brandy can supply the branch gains. Each is simply the parallel combination of the impedances connected to the destination node divided by the connecting impedance. If you substitute for the branch gains and ∆, you will have a very large equation. This is typical. K9 only promises to obtain the equation in a simple manner. If you have a circuit with lots of interactions, the gain equations will be large to handle all the interactions. Electronics can be difficult.

 

Gain from one SFG node to another SFG node

 

Mason’s gain formula only applies for input to output gains. You can find the gain between nodes by applying Mason’s formula twice. Find the gain from the input to the first SFG node. Next find the gain from the input to the second SFG node. The ratio of the gains will be the gain from the first to the second node. Let’s find the gain from V1 to Vout.

 

 

The gain from Vin to V1 is:

Where:

G1 = g3

 

∆1 = 1 – (L2 + L4) = 1 – g2*g2f – g4*g4f

 

The SFG has a single path from Vin to V1. This path does not touch L2 and L4.

 

 

The gain from Vin to Vout was found above:

 

 

The gain from V1 to Vout is:

 

The ∆ term is common to both gains and cancels. The gain from one SFG node to another SFG node is thus the ratio of the gains from the input to each node. Since the ∆ term cancels, the gain is simply the ratio of the path gains.

 

This technique is useful for finding the gain from non-ideal inputs.

 

Electronics

 

SFGs can be used in many applications. In K9 analysis certain restrictions apply:

 

The variables must be a current or a voltage.

The inputs to Mason’s gain formula must be Ideal sources.

The equations must be linear.   

The variable and branch values can be complex or s-Domain values.

 

What does this mean?

A SFG node can only be a current or a voltage. It can not be power, charge, or other Electronic values.

Inputs must be Ideal sources. Non-ideal sources have a source impedance which becomes part of the circuit schematic. The input to output gain is always the gain from the ideal source to the output. You can find the gain from one SFG node to another SFG node via the ratio of two gain equations.

 

A gain is the ratio of two variables. If the input is a current and the output is a voltage, the gain is an impedance. To find the impedance of a circuit node to ground, just connect an ideal 1 amp current source to the node and use Mason’s gain formula to find the gain from the current source to the node voltage.

 

Linear equation means that you can treat each path separately. If the SFG has multiple paths, just add the gains for each path. The same applies to multiple circuit inputs. Just add the gains for each input. Mason automatically applies Superposition. You don’t have to analyze separate circuits. Mason will short-circuit the other voltage inputs for you.

 

K9 prefers to uses variables rather than values because variables are easier. You don’t have to handle complex numbers or s terms. Complex math is left for reader exercises.

 

Stability

 

Stability can be a confusing topic in Electronics. Here’s a simple K9 interpretation.

 

A Circuit has many operating points. Each point is a set of voltages and currents, which are solutions to the circuit equations. The SFG is the set of equations and Mason provides a solution to the equations. If the SFG is a valid set of equations, then there should be a single solution. You can verify a solution by forcing the circuit into the solution. All currents and voltages should be equal to the solution.

 

The next thing to consider is what happens if the circuit is disturbed. Does it go back to the solution point, or does it go off in the opposite direction? If it returns to the solution point, the circuit is stable. If it diverges, the circuit is unstable. How do we find out whether a solution point is stable?

 

The SFG represents a closed-loop control system. The control system stability criterion applies. The circuit stability is determined by the poles of ∆. Mason’s Gain formula provides an easy way to get the system determinant, ∆. Simply stated, ∆ must be positive and not equal to zero.

 

Stability is normally analyzed in the s-Domain . K9 prefers simplicity. Just look at ∆. If the value is always positive and not zero, the circuit is stable. On the Legacy page two circuits are analyzed, an inverting amplifier and a Trial amplifier. Both circuits have solutions to the circuit equations. The Trial amplifier has a negative value for ∆, which is hidden by the analysis. Legacy analysis often creates an “elegant” analysis that avoids simultaneous equations and the system determinant.

 

Electronics classifies feedback as positive and negative by the loop gain value. If you look at the ∆ equation, negative loops create positive terms and are stable as long as the loop gain is negative. Positive loops can create negative and zero ∆ values if the loop gain is greater than 1. The implication that positive loops are unstable may not be valid.  The example circuit has six loops. Each loop gain is positive and less than 1. Passive circuits are stable.

 

The stability criterion is sufficient for a linear circuit, but may not be sufficient for an actual Electronic circuit.

Linear operation assumes that the solution point can have any voltage or current value. Practical circuits have a finite range of voltage and current. Linear operation is only possible within this range. If the solution point is outside the circuit operating range, the circuit can not reach this point. At the boundary the circuit equations change.

 

Even if your circuit is stable, you may have oscillations. If a stable solution point is outside the operating range, the circuit will try to reach this new stable operating point, but encounter a boundary. At the boundary the equations change. The circuit now operates with two sets of equations. This may create an oscillation. Don’t confuse stability and oscillation. Stability means converge. Unstable circuits diverge. This means that they will encounter a circuit limit. It does not mean that they will oscillate.

 

The confusion is the that multiple criteria apply. A valid set of equations only creates a single solution. There is no implication that the circuit will remain at the solution. The stability criterion determines whether a solution point is stable. Neither checks whether the operating point is within the circuit operating range.

 

Small values of ∆ create large gains and may drive a circuit to its limit. You need to check the ∆ value at all frequencies. If ∆ is small and positive, the circuit may momentarily oscillate about a solution point before converging to the solution point. This can be quantized by an s-Domain analysis. To verify circuit operation, you need to test an actual circuit or at least perform a transient circuit simulation. A theoretical analysis is not sufficient.

 

Signal Flow

 

The SFG shows signal flow in an intuitive manner.  If you create a SFG from a set of equations you may create an ugly SFG graph. The graph is fine for solving equations, but may not match your circuit interpretation. An Ugly graph is the main reason why SFGs have not been widely used in Electronics.

 

The Signal Flow page showed that the VSA signal flow description is incomplete because the SFG must represent an independent set of equations. The VSA procedure shows input to output signal flow, but ignores the ground node. This may appear illogical, ok entirely insane, but is totally valid. Try VSA or create a meaningful SFG. Try to avoid ugly SFGs.

 

Summary

 

Graph theory is a fun branch of Mathematics. Enjoy the fun. Graphs provide a means to add additional information in a subtle manner. It’s ok to use crayons to color a graph.

 

A netlist and a schematic can define a circuit. The schematic allows you to display the circuit in an artistic manner. Use this feature to make the circuit easy to understand. The schematics page provides the rules.

 

A set of equations describes circuit operation. You can present the equations in general matrix form or a SFG.

A SFG can be transformed into a set of equations and vice versa.

 

The SFG should not be an ugly graph. The SFG should provide a clear description of the circuit.

 

Mason’s Gain formula provides an easy way to solve circuit equations. The circuit transfer function is simply the sum of path gains times correction factors.

 

The SFG loops show circuit interaction and form part of the system determinant ∆. ∆ can be analyzed for circuit stability.

 

A SFG should me more than a set of equations. It should show circuit operation in an intuitive manner. Step up to Mason’s challenge.

 

With SFGs, K9 analysis is Dog-Gone-Simple.

 

 

 

 

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